SSM3K36TU 2014-03-01 1 toshiba field-effect transistor silicon n-channel mos type SSM3K36TU high-speed switching applications ? 1.5-v drive ? low on-resistance: r on = 1.52 ? (max) (@v gs = 1.5 v) : r on = 1.14 ? (max) (@v gs = 1.8 v) : r on = 0.85 ? (max) (@v gs = 2.5 v) : r on = 0.66 ? (max) (@v gs = 4.5 v) : r on = 0.63 ? (max) (@v gs = 5.0 v) absolute maximum ratings (ta = 25 ? c) characteristics symbol rating unit drain?source voltage v dss 20 v gate?source voltage v gss 10 v dc i d 500 drain current pulse i dp 1000 ma p d (note 1) 500 drain power dissipation p d (note 2) 800 mw channel temperature t ch 150 c storage temperature t stg ?55 to 150 c note: using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause th is product to decrease in the reliability significantly even if the operating conditions (i .e. operating temperature/curre nt/voltage, etc.) are within the absolute maximum ratings. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/?derating concept and methods?) and indi vidual reliability data (i.e. reliability test report and estimated failure rate, etc). note1: mounted on an fr4 board (25.4 mm 25.4 mm 1.6 mm, cu pad: 645 mm 2 ) note2: mounted on a ceramic board. (25.4 mm 25.4 mm 0.8 mm, cu pad: 645 mm 2 ) marking equivalent circuit (top view) unit: mm jedec D jeita D toshiba 2-2u1a weight: 6.6 mg (typ.) ufm 1: gate 2: source 3: drain -0.05 1.70.1 2.10.1 0.650.05 1 2 2.00.1 3 0.70.05 +0.1 0.3 0.1660.05 n x 1 2 3 12 3 start of commercial production 2008-02
SSM3K36TU 2014-03-01 2 electrical characteristics (ta = 25c) characteristics symbol test conditions min typ. max unit v (br) dss i d = 1 ma, v gs = 0 20 ? ? drain-source breakdown voltage v (br) dsx i d = 1 ma, v gs = - 10 v 12 ? ? v drain cutoff current i dss v ds =20 v, v gs = 0 ? ? 1 a gate leakage current i gss v gs = 10 v, v ds = 0 ? ? 1 a gate threshold voltage v th v ds = 3 v, i d = 1 ma 0.35 ? 1.0 v forward transfer admittance |y fs | v ds = 3 v, i d = 200 ma (note3) 420 840 ? ms i d = 200 ma, v gs = 5.0 v (note3) ? 0.46 0.63 i d = 200 ma, v gs = 4.5 v (note3) ? 0.51 0.66 i d = 200 ma, v gs = 2.5 v (note3) ? 0.66 0.85 i d = 100 ma, v gs = 1.8 v (note3) ? 0.81 1.14 drain-source on-resistance r ds (on) i d = 50 ma, v gs = 1.5 v (note3) ? 0.95 1.52 input capacitance c iss ? 46 ? output capacitance c oss ? 10.8 ? reverse transfer capacitance c rss v ds = 10 v, v gs = 0, f = 1 mhz ? 7.3 ? pf total gate charge q g ? 1.23 ? gate? source charge q gs ? 0.60 ? gate? drain charge q gd v ds = 10v, i d = 0.5 a, v gs = 4.0 v ? 0.63 ? nc turn-on time t on ? 30 ? switching time turn-off time t off v dd = 10 v, i d = 200 ma v gs = 0 to 2.5 v, r g = 50 ? 75 ? ns drain-source forward voltage v dsf i d = -0.5 a, v gs = 0 v (note2) ? -0.88 -1.2 v note2: pulse test switching time test circuit usage considerations let v th be the voltage applied between gate and sour ce that causes the drain current (i d ) to below (1 ma for the SSM3K36TU). then, for normal switching operation, v gs(on) must be higher than v th, and v gs(off) must be lower than v th. this relationship can be expressed as: v gs(off) < v th < v gs(on). take this into consideration when using the device. handling precaution when handling individual devices that are not yet mounted on a circuit board, make sure that the environment is protected against electrostatic discharge. operators should wear antistatic clothing, and containers and other objects that come into direct contact with devices should be made of antistatic materials. 2.5 v t on t off (c) v out 0 v v dd v ds (on) t r t f 10% 90% 90% 10% (a) test circuit v dd = 10 v r g = 50 duty 1% v in : t r , t f < 5 ns common source ta = 25c 0 2.5 v in out v dd 10 s r g (b) v in
SSM3K36TU 2014-03-01 3 ambient temperature ta (c) v th ? ta gate threshold voltage v th (v) 1.0 0 ? 50 0 150 50 100 0.5 common source v ds = 3 v i d = 1 ma ambient temperature ta (c) r ds (on) ? ta drain-source on-resistance r ds (on) ( ? ) 0 ? 50 0 50 150 1.0 100 common source 1.5 0.5 i d = 50 m a / v gs = 1.5 v 100 m a / 1.8 v 200 m a / 5.0 v 200 m a / 4.5 v 200 m a / 2.5 v r ds (on) ? i d drain current i d (ma) drain-source on-resistance r ds (on) ( ? ) 0 400 600 800 0 2 1000 3 1 200 common source ta = 25c vgs = 4.5v 1.5 v 1.8 v 2.5v gate-source voltage v gs (v) i d ? v gs drain current i d (ma) 1000 0 10 100 0.1 1 0.01 3.0 1.0 2.0 common source v ds = 3 v ? 25 c ta = 100 c 25 c drain-source voltage v ds (v) i d ? v ds drain current i d (ma) 0 800 0 0.2 0.4 0.6 600 10 v 200 4.5 v 1.8 v 1000 0.8 1.0 2.5 v 1.5 v 400 common source ta = 25 c vgs = 1.2 v drain-source on-resistance r ds (on) ( ? ) 0 gate-source voltage v gs (v) 4 0 r ds (on) ? v gs 2 3 1 8 2 6 10 i d = 200 ma common source ? 25 c ta = 100 c 25 c
SSM3K36TU 2014-03-01 4 drain-source voltage v ds (v) c ? v ds capacitance c (pf) 1 0.1 1 10 100 10 100 30 50 3 5 common source ta = 25c f = 1 mhz v gs = 0 v c iss c oss c rss total gate charge qg (nc) dynamic input characteristic gate-source voltage v gs (v) 0 0 2 4 8 10 6 2 1 3 common source i d = 0.5 a ta = 25c v dd = 10 v v dd = 16 v drain current i d (ma) switching time t (ns) t ? i d 10 1 1000 10 100 1000 100 t f t on t r common source v dd = 10 v v gs = 0 to 2.5 v ta = 25 c r g = 4.7 t off drain reverse current i dr (ma) drain-source voltage v ds (v) i dr ? v ds 1000 0 10 100 0.1 1 ?0.5 ?1.0 ?1.5 common source v gs = 0 v g d s i dr ? 25 c ta =100 c 25 c ambient temperature ta (c) p d ? t a drain power dissipation p d (mw) 800 0 200 120 100 140 400 600 160 1000 80 60 40 20 0 -20 -40 a b a: mounted on a ceramic board (25.4mm 25.4mm 0.8mm , cu pad : 645 mm 2 ) b: mounted on a fr4 board (25.4mm 25.4mm 1.6mm , cu pad : 645 mm 2 ) drain current i d (ma) forward transfer admittance ? y fs ? (ms) |y fs | ? i d 10 1000 1000 10 100 3000 300 1 10000 100 30 common source v ds = 3 v ta = 25c
SSM3K36TU 2014-03-01 5 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively "toshiba"), reserve the right to make changes to the in formation in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduc ed without prior written permission from toshiba. even with toshiba's written permission, reproduc tion is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for prov iding adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a ma lfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, cu stomers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and application notes for product and the precautions and condi tions set forth in the "toshiba semiconductor reliability handbook" and (b) the instructions for the application with which the product will be us ed with or for. customers are solely responsible for all aspe cts of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) eval uating and determining the applicability of any info rmation contained in this document, or in c harts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operatin g parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? 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